arm: Add +nomve and +nomve.fp options to -mcpu=cortex-m55
authorJoe Ramsay <Joe.Ramsay@arm.com>
Tue, 6 Oct 2020 06:33:52 +0000 (07:33 +0100)
committerSrinath Parvathaneni <srinath.parvathaneni@arm.com>
Tue, 6 Oct 2020 07:10:47 +0000 (08:10 +0100)
commit3e8fb15a8cfd0e62dd474af9f536863392ed7572
treea239888a26c65f40952abaeb562e37650d92726f
parentd2364fb436ff64a4c5293b697f37d53fd58a9f54
arm: Add +nomve and +nomve.fp options to -mcpu=cortex-m55

This patch rearranges feature bits for MVE and FP to implement the
following flags for -mcpu=cortex-m55.

  - +nomve:    equivalent to armv8.1-m.main+fp.dp+dsp.
  - +nomve.fp: equivalent to armv8.1-m.main+mve+fp.dp (+dsp is implied by +mve).
  - +nofp:     equivalent to armv8.1-m.main+mve (+dsp is implied by +mve).
  - +nodsp:    equivalent to armv8.1-m.main+fp.dp.

Combinations of the above:

  - +nomve+nofp: equivalent to armv8.1-m.main+dsp.
  - +nodsp+nofp: equivalent to armv8.1-m.main.

Due to MVE and FP sharing vfp_base, some new syntax was required in the CPU
description to implement the concept of 'implied bits'. These are non-named
features added to the ISA late, depending on whether one or more features which
depend on them are present. This means vfp_base can be present when only one of
MVE and FP is removed, but absent when both are removed.

gcc/ChangeLog:

2020-07-31  Joe Ramsay  <joe.ramsay@arm.com>

* config/arm/arm-cpus.in:
(ALL_FPU_INTERNAL): Remove vfp_base.
(VFPv2): Remove vfp_base.
(MVE): Remove vfp_base.
(vfp_base): Redefine as implied bit dependent on MVE or FP
(cortex-m55): Add flags to disable MVE, MVE FP, FP and DSP extensions.
* config/arm/arm.c (arm_configure_build_target): Add implied bits to ISA.
* config/arm/parsecpu.awk:
(gen_isa): Print implied bits and their dependencies to ISA header.
(gen_data): Add parsing for implied feature bits.

gcc/testsuite/ChangeLog:

* gcc.target/arm/cortex-m55-nodsp-flag-hard.c: New test.
* gcc.target/arm/cortex-m55-nodsp-flag-softfp.c: New test.
* gcc.target/arm/cortex-m55-nodsp-nofp-flag-softfp.c: New test.
* gcc.target/arm/cortex-m55-nofp-flag-hard.c: New test.
* gcc.target/arm/cortex-m55-nofp-flag-softfp.c: New test.
* gcc.target/arm/cortex-m55-nofp-nomve-flag-softfp.c: New test.
* gcc.target/arm/cortex-m55-nomve-flag-hard.c: New test.
* gcc.target/arm/cortex-m55-nomve-flag-softfp.c: New test.
* gcc.target/arm/cortex-m55-nomve.fp-flag-hard.c: New test.
* gcc.target/arm/cortex-m55-nomve.fp-flag-softfp.c: New test.
* gcc.target/arm/multilib.exp: Add tests for -mcpu=cortex-m55.
14 files changed:
gcc/config/arm/arm-cpus.in
gcc/config/arm/arm.c
gcc/config/arm/parsecpu.awk
gcc/testsuite/gcc.target/arm/cortex-m55-nodsp-flag-hard.c [new file with mode: 0644]
gcc/testsuite/gcc.target/arm/cortex-m55-nodsp-flag-softfp.c [new file with mode: 0644]
gcc/testsuite/gcc.target/arm/cortex-m55-nodsp-nofp-flag-softfp.c [new file with mode: 0644]
gcc/testsuite/gcc.target/arm/cortex-m55-nofp-flag-hard.c [new file with mode: 0644]
gcc/testsuite/gcc.target/arm/cortex-m55-nofp-flag-softfp.c [new file with mode: 0644]
gcc/testsuite/gcc.target/arm/cortex-m55-nofp-nomve-flag-softfp.c [new file with mode: 0644]
gcc/testsuite/gcc.target/arm/cortex-m55-nomve-flag-hard.c [new file with mode: 0644]
gcc/testsuite/gcc.target/arm/cortex-m55-nomve-flag-softfp.c [new file with mode: 0644]
gcc/testsuite/gcc.target/arm/cortex-m55-nomve.fp-flag-hard.c [new file with mode: 0644]
gcc/testsuite/gcc.target/arm/cortex-m55-nomve.fp-flag-softfp.c [new file with mode: 0644]
gcc/testsuite/gcc.target/arm/multilib.exp