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(parent: 8081481) | patch
radeonsi: adjust ESGS ring buffer size computation on VI
authorMarek Olšák <marek.olsak@amd.com>
Sat, 22 Apr 2017 12:47:03 +0000 (14:47 +0200)
committerMarek Olšák <marek.olsak@amd.com>
Wed, 26 Apr 2017 11:08:05 +0000 (13:08 +0200)
commit3f2a0649abc982fe5de647a96fbe354aa9e41a59
tree76b71731f3ff02c7c547d44e99a92b7f2c495cf5tree
parent80814819c28353a38c03d4cdba39983b8cf260accommit | diff
radeonsi: adjust ESGS ring buffer size computation on VI

Cc: 17.0 17.1 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
src/gallium/drivers/radeonsi/si_state_shaders.c diff | blob | history