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(parent: a45289d) | patch
x86: Use operand size 4 when it would be 2 for cmpxchg8b.
authorGabe Black <gabeblack@google.com>
Wed, 13 Dec 2017 09:03:00 +0000 (01:03 -0800)
committerGabe Black <gabeblack@google.com>
Thu, 14 Dec 2017 00:25:21 +0000 (00:25 +0000)
commit3f64b374c49491f18dc2ca538ed8c8597e4aac83
tree6a8647fdb701ff2dfe6eb8f852160f85f6158ac2tree
parenta45289dee8bc5fb325cab1429c6730dcaf86c58dcommit | diff
x86: Use operand size 4 when it would be 2 for cmpxchg8b.

This means the instruction is treated as cmpxchg8b when the effective
operand size is 16 bits.

Change-Id: I4d9bb295f96097e1746a9bbccb2c579d14738fab
Reviewed-on: https://gem5-review.googlesource.com/6603
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Gabe Black <gabeblack@google.com>
src/arch/x86/isa/insts/general_purpose/semaphores.py diff | blob | history
src/arch/x86/isa/microasm.isa diff | blob | history