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(parent: cf8cc50) | patch
Initial Cyclone 10 support
authordh73 <dh73_fpga@qq.com>
Thu, 9 Nov 2017 04:45:21 +0000 (22:45 -0600)
committerdh73 <dh73_fpga@qq.com>
Thu, 9 Nov 2017 04:45:21 +0000 (22:45 -0600)
commit3fd1d61e2aa65bfc88de691071a3295888ed2aa3
tree04ebf8a6b55de9991760af4206f6c064e4de7278tree
parentcf8cc50bf51c2fa36a3189e131a7e7fe0807ae8fcommit | diff
Initial Cyclone 10 support
techlibs/intel/Makefile.inc diff | blob | history
techlibs/intel/cyclone10/cells_arith.v [new file with mode: 0644] blob
techlibs/intel/cyclone10/cells_map.v [new file with mode: 0644] blob
techlibs/intel/cyclone10/cells_sim.v [new file with mode: 0644] blob
techlibs/intel/synth_intel.cc diff | blob | history