Added $anyconst and $aconst
authorClifford Wolf <clifford@clifford.at>
Wed, 27 Jul 2016 13:41:22 +0000 (15:41 +0200)
committerClifford Wolf <clifford@clifford.at>
Wed, 27 Jul 2016 13:41:22 +0000 (15:41 +0200)
commit40563129872f5a2287f54cb0dbd79534b493a5d6
tree0ef8462549bafba7356efd94570a19d230b68af9
parenta7b07696238dbfd8e4fb5fd41d597200abef4909
Added $anyconst and $aconst
frontends/ast/genrtlil.cc
frontends/ast/simplify.cc
frontends/verilog/verilog_parser.y
kernel/celltypes.h
kernel/rtlil.cc
manual/CHAPTER_CellLib.tex
techlibs/common/simlib.v