radeonsi/gfx9: fix MIP0_WIDTH & MIP0_HEIGHT for compressed texture blits
authorMarek Olšák <marek.olsak@amd.com>
Mon, 30 Jan 2017 23:56:34 +0000 (00:56 +0100)
committerMarek Olšák <marek.olsak@amd.com>
Thu, 30 Mar 2017 12:44:33 +0000 (14:44 +0200)
commit405bacd820027a239caca203cf6602da70dc5bbc
tree2ff7fb3815d5815e7870dcbb4bfb98455fd82742
parent354285afa08f48d0aab232820698aacc54e347f7
radeonsi/gfx9: fix MIP0_WIDTH & MIP0_HEIGHT for compressed texture blits

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
src/gallium/drivers/r600/r600_blit.c
src/gallium/drivers/r600/r600_pipe.h
src/gallium/drivers/radeon/r600_pipe_common.h
src/gallium/drivers/radeon/r600_texture.c
src/gallium/drivers/radeonsi/si_blit.c
src/gallium/drivers/radeonsi/si_state.c