aarch64: Try to avoid inappropriate default errors
After parsing a '{' and the first register, parse_typed_reg would
report errors in subsequent registers in the same way as for the
first register. It used set_default_error, which reports errors
of the form "operand N must be X".
The problem is that if there are multiple opcode entries for the
same mnemonic, there could be several matches that lead to a
default error. There's no guarantee that the default error for
the register list is the one that will be chosen.
To take an example from the testsuite:
ext z0.b,{z31.b,z32.b},#0
gave:
operand 2 must be an SVE vector register
with the error being reported against the single-vector version
of ext, even though the operand is clearly a list.
This patch uses set_fatal_syntax_error to bump the priority of the
error once we're sure that the operand is a list of the right type.