i965/gen4-5: Set ENDIF dst and src0 fields to the null register.
authorFrancisco Jerez <currojerez@riseup.net>
Mon, 6 Jul 2015 15:23:57 +0000 (18:23 +0300)
committerFrancisco Jerez <currojerez@riseup.net>
Tue, 7 Jul 2015 17:20:22 +0000 (20:20 +0300)
commit40e2102e528498dd4c03c4567d3522241f4d1f22
tree92112f656bc741e77c063f49f3c979359f17543d
parent248b26429f52d0f19949a083aa3e0aeebcbe2138
i965/gen4-5: Set ENDIF dst and src0 fields to the null register.

The hardware docs don't mention explicitly what these fields should
be, but I've verified experimentally on ILK that using a GRF as
destination causes the register to be corrupted when the execution
size of an ENDIF instruction is higher than 8 -- and because the
destination we were using was g0, eventually a hang.

Fixes some 150 piglit tests on Gen4-5 when forced to run shaders with
if conditionals 16-wide, e.g. shaders/glsl-fs-sampler-numbering-3.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
src/mesa/drivers/dri/i965/brw_eu_emit.c