Add or-assignment operator
authorKamil Rakoczy <krakoczy@antmicro.com>
Wed, 3 Jun 2020 11:51:57 +0000 (13:51 +0200)
committerKamil Rakoczy <krakoczy@antmicro.com>
Wed, 24 Jun 2020 09:53:50 +0000 (11:53 +0200)
commit416a66aee822c999a28f580cbcdb24cdf4e73a13
treed827e2574f9417dc88f50fbd9446aaf42b360b18
parent0835a86e30fc2a934f5e6c96b28c90b59654ed92
Add or-assignment operator

Signed-off-by: Kamil Rakoczy <krakoczy@antmicro.com>
frontends/verilog/verilog_lexer.l
frontends/verilog/verilog_parser.y