soc/cores/sdram/settings: simplify modules and fix timing margins computation
authorFlorent Kermarrec <florent@enjoy-digital.fr>
Mon, 18 Apr 2016 16:22:53 +0000 (18:22 +0200)
committerFlorent Kermarrec <florent@enjoy-digital.fr>
Mon, 18 Apr 2016 16:22:53 +0000 (18:22 +0200)
commit429f533bd0c88d682bd19423ad9071dc03a2728d
treed5a969b58ef9cfd1c47d29e9396071574d284de5
parent7b3699839ece05913b474c80179ebdd630e3404b
soc/cores/sdram/settings: simplify modules and fix timing margins computation
litex/boards/targets/de0nano.py
litex/boards/targets/kc705.py
litex/boards/targets/minispartan6.py
litex/boards/targets/sim.py
litex/soc/cores/sdram/settings.py