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(parent: 73e30e7) | patch
gdb/riscv: Partial support for instructions up to 176-bit
authorTsukasa OI <research_trasio@irq.a4lg.com>
Tue, 4 Oct 2022 08:42:35 +0000 (08:42 +0000)
committerTsukasa OI <research_trasio@irq.a4lg.com>
Tue, 4 Oct 2022 13:21:41 +0000 (13:21 +0000)
commit436a7b5ef27e6d866a631d6020e904321cbee7e8
tree4253a8461bb8f2023c861ef1115a33106004f854tree
parent73e30e726cd778d055a81c1f4c2ccff1c1acdaa9commit | diff
gdb/riscv: Partial support for instructions up to 176-bit

Because riscv_insn_length started to support instructions up to 176-bit,
we need to increase buf size to 176-bit in size.

Also, that would break an assumption in riscv_insn::decode so this commit
fixes it, noting that instructions longer than 64-bit are not fully
supported yet.
gdb/riscv-tdep.c diff | blob | history