actually sv vector-vector add worked fine
authorLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Tue, 2 Oct 2018 11:22:33 +0000 (12:22 +0100)
committerLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Tue, 2 Oct 2018 11:22:33 +0000 (12:22 +0100)
commit4565d419df10f75233b58743b999b929fe133f16
treed73b3ab783cdd79e489b0dd09fbd8c9d167fe25a
parent7e9be87de1f3ed1a07b4d90f059ea2d1882fda6b
actually sv vector-vector add worked fine

(forgot to set CSR on 2nd register)
isa/rv64ud/sv_fadd.S