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(parent: 1cff83e) | patch
[AArch64] Implement ADD in vector registers for 32-bit scalar values.
authorJames Greenhalgh <james.greenhalgh@arm.com>
Mon, 23 Jun 2014 09:04:40 +0000 (09:04 +0000)
committerJames Greenhalgh <jgreenhalgh@gcc.gnu.org>
Mon, 23 Jun 2014 09:04:40 +0000 (09:04 +0000)
commit463036be82cef539763c51afd5d94c51bd9eb66c
tree45575022eafbc5ae469d2e55f7b5139d2d38cc39tree
parent1cff83e21d7dadcb976a0c624636b5411fe80904commit | diff
[AArch64] Implement ADD in vector registers for 32-bit scalar values.

gcc/

* config/aarch64/aarch64.md (*addsi3_aarch64): Add alternative in
vector registers.

gcc/testsuite/

* gcc.target/aarch64/scalar_shift_1.c: Fix expected assembler.

From-SVN: r211887
gcc/ChangeLog diff | blob | history
gcc/config/aarch64/aarch64.md diff | blob | history
gcc/testsuite/ChangeLog diff | blob | history
gcc/testsuite/gcc.target/aarch64/scalar_shift_1.c diff | blob | history