arm: Delete authors lists from the arm files.
authorGabe Black <gabeblack@google.com>
Mon, 17 Feb 2020 07:47:36 +0000 (23:47 -0800)
committerGabe Black <gabeblack@google.com>
Tue, 18 Feb 2020 03:35:23 +0000 (03:35 +0000)
commit479ca6a895bc7c3304889fcbe0f315eac6fabe50
tree612d826e6162f75e0adc7577a2097d77eecfd344
parent9a58428a2bc623aac1f1652bfcf6d063964c5ce7
arm: Delete authors lists from the arm files.

Change-Id: I6e9f5b70faebe5d279bff303c42f59a00a7845ec
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/25447
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
250 files changed:
src/arch/arm/ArmISA.py
src/arch/arm/ArmInterrupts.py
src/arch/arm/ArmNativeTrace.py
src/arch/arm/ArmPMU.py
src/arch/arm/ArmSemihosting.py
src/arch/arm/ArmSystem.py
src/arch/arm/ArmTLB.py
src/arch/arm/SConscript
src/arch/arm/SConsopts
src/arch/arm/ccregs.hh
src/arch/arm/decoder.cc
src/arch/arm/decoder.hh
src/arch/arm/fastmodel/CortexA76/FastModelCortexA76.py
src/arch/arm/fastmodel/CortexA76/SConscript
src/arch/arm/fastmodel/CortexA76/cortex_a76.cc
src/arch/arm/fastmodel/CortexA76/cortex_a76.hh
src/arch/arm/fastmodel/CortexA76/evs.cc
src/arch/arm/fastmodel/CortexA76/evs.hh
src/arch/arm/fastmodel/CortexA76/thread_context.cc
src/arch/arm/fastmodel/CortexA76/thread_context.hh
src/arch/arm/fastmodel/CortexA76/x1/x1.lisa
src/arch/arm/fastmodel/CortexA76/x2/x2.lisa
src/arch/arm/fastmodel/CortexA76/x3/x3.lisa
src/arch/arm/fastmodel/CortexA76/x4/x4.lisa
src/arch/arm/fastmodel/FastModel.py
src/arch/arm/fastmodel/GIC/FastModelGIC.py
src/arch/arm/fastmodel/GIC/GIC.lisa
src/arch/arm/fastmodel/GIC/SConscript
src/arch/arm/fastmodel/GIC/gic.cc
src/arch/arm/fastmodel/GIC/gic.hh
src/arch/arm/fastmodel/SConscript
src/arch/arm/fastmodel/SConsopts
src/arch/arm/fastmodel/amba_from_tlm_bridge.cc
src/arch/arm/fastmodel/amba_from_tlm_bridge.hh
src/arch/arm/fastmodel/amba_ports.hh
src/arch/arm/fastmodel/amba_to_tlm_bridge.cc
src/arch/arm/fastmodel/amba_to_tlm_bridge.hh
src/arch/arm/fastmodel/arm_fast_model.py
src/arch/arm/fastmodel/common/signal_receiver.hh
src/arch/arm/fastmodel/fastmodel.cc
src/arch/arm/fastmodel/iris/Iris.py
src/arch/arm/fastmodel/iris/SConscript
src/arch/arm/fastmodel/iris/cpu.cc
src/arch/arm/fastmodel/iris/cpu.hh
src/arch/arm/fastmodel/iris/memory_spaces.hh
src/arch/arm/fastmodel/iris/thread_context.cc
src/arch/arm/fastmodel/iris/thread_context.hh
src/arch/arm/fastmodel/iris/tlb.cc
src/arch/arm/fastmodel/iris/tlb.hh
src/arch/arm/fastmodel/protocol/ExportedClockRateControlProtocol.lisa
src/arch/arm/fastmodel/protocol/SConscript
src/arch/arm/fastmodel/protocol/SignalInterruptProtocol.lisa
src/arch/arm/fastmodel/protocol/exported_clock_rate_control.hh
src/arch/arm/fastmodel/protocol/signal_interrupt.hh
src/arch/arm/faults.cc
src/arch/arm/faults.hh
src/arch/arm/insts/branch.cc
src/arch/arm/insts/branch.hh
src/arch/arm/insts/branch64.cc
src/arch/arm/insts/branch64.hh
src/arch/arm/insts/crypto.cc
src/arch/arm/insts/crypto.hh
src/arch/arm/insts/data64.cc
src/arch/arm/insts/data64.hh
src/arch/arm/insts/fplib.cc
src/arch/arm/insts/fplib.hh
src/arch/arm/insts/macromem.cc
src/arch/arm/insts/macromem.hh
src/arch/arm/insts/mem.cc
src/arch/arm/insts/mem.hh
src/arch/arm/insts/mem64.cc
src/arch/arm/insts/mem64.hh
src/arch/arm/insts/misc.cc
src/arch/arm/insts/misc.hh
src/arch/arm/insts/misc64.cc
src/arch/arm/insts/misc64.hh
src/arch/arm/insts/mult.hh
src/arch/arm/insts/neon64_mem.hh
src/arch/arm/insts/pred_inst.cc
src/arch/arm/insts/pred_inst.hh
src/arch/arm/insts/pseudo.cc
src/arch/arm/insts/pseudo.hh
src/arch/arm/insts/static_inst.cc
src/arch/arm/insts/static_inst.hh
src/arch/arm/insts/sve.cc
src/arch/arm/insts/sve.hh
src/arch/arm/insts/sve_macromem.hh
src/arch/arm/insts/sve_mem.cc
src/arch/arm/insts/sve_mem.hh
src/arch/arm/insts/vfp.cc
src/arch/arm/insts/vfp.hh
src/arch/arm/interrupts.cc
src/arch/arm/interrupts.hh
src/arch/arm/intregs.hh
src/arch/arm/isa.cc
src/arch/arm/isa.hh
src/arch/arm/isa/bitfields.isa
src/arch/arm/isa/copyright.txt
src/arch/arm/isa/decoder/aarch64.isa
src/arch/arm/isa/decoder/arm.isa
src/arch/arm/isa/decoder/decoder.isa
src/arch/arm/isa/decoder/thumb.isa
src/arch/arm/isa/formats/aarch64.isa
src/arch/arm/isa/formats/basic.isa
src/arch/arm/isa/formats/branch.isa
src/arch/arm/isa/formats/breakpoint.isa
src/arch/arm/isa/formats/crypto64.isa
src/arch/arm/isa/formats/data.isa
src/arch/arm/isa/formats/formats.isa
src/arch/arm/isa/formats/fp.isa
src/arch/arm/isa/formats/m5ops.isa
src/arch/arm/isa/formats/macromem.isa
src/arch/arm/isa/formats/mem.isa
src/arch/arm/isa/formats/misc.isa
src/arch/arm/isa/formats/mult.isa
src/arch/arm/isa/formats/neon64.isa
src/arch/arm/isa/formats/pred.isa
src/arch/arm/isa/formats/pseudo.isa
src/arch/arm/isa/formats/sve_2nd_level.isa
src/arch/arm/isa/formats/sve_top_level.isa
src/arch/arm/isa/formats/uncond.isa
src/arch/arm/isa/includes.isa
src/arch/arm/isa/insts/aarch64.isa
src/arch/arm/isa/insts/amo64.isa
src/arch/arm/isa/insts/branch.isa
src/arch/arm/isa/insts/branch64.isa
src/arch/arm/isa/insts/crypto.isa
src/arch/arm/isa/insts/crypto64.isa
src/arch/arm/isa/insts/data.isa
src/arch/arm/isa/insts/data64.isa
src/arch/arm/isa/insts/div.isa
src/arch/arm/isa/insts/fp.isa
src/arch/arm/isa/insts/fp64.isa
src/arch/arm/isa/insts/insts.isa
src/arch/arm/isa/insts/ldr.isa
src/arch/arm/isa/insts/ldr64.isa
src/arch/arm/isa/insts/m5ops.isa
src/arch/arm/isa/insts/macromem.isa
src/arch/arm/isa/insts/mem.isa
src/arch/arm/isa/insts/misc.isa
src/arch/arm/isa/insts/misc64.isa
src/arch/arm/isa/insts/mult.isa
src/arch/arm/isa/insts/neon.isa
src/arch/arm/isa/insts/neon64.isa
src/arch/arm/isa/insts/neon64_mem.isa
src/arch/arm/isa/insts/pauth.isa
src/arch/arm/isa/insts/str.isa
src/arch/arm/isa/insts/str64.isa
src/arch/arm/isa/insts/sve.isa
src/arch/arm/isa/insts/sve_mem.isa
src/arch/arm/isa/main.isa
src/arch/arm/isa/operands.isa
src/arch/arm/isa/templates/basic.isa
src/arch/arm/isa/templates/branch.isa
src/arch/arm/isa/templates/branch64.isa
src/arch/arm/isa/templates/crypto.isa
src/arch/arm/isa/templates/data64.isa
src/arch/arm/isa/templates/macromem.isa
src/arch/arm/isa/templates/mem.isa
src/arch/arm/isa/templates/mem64.isa
src/arch/arm/isa/templates/misc.isa
src/arch/arm/isa/templates/misc64.isa
src/arch/arm/isa/templates/mult.isa
src/arch/arm/isa/templates/neon.isa
src/arch/arm/isa/templates/neon64.isa
src/arch/arm/isa/templates/pred.isa
src/arch/arm/isa/templates/semihost.isa
src/arch/arm/isa/templates/sve.isa
src/arch/arm/isa/templates/sve_mem.isa
src/arch/arm/isa/templates/templates.isa
src/arch/arm/isa/templates/vfp.isa
src/arch/arm/isa/templates/vfp64.isa
src/arch/arm/isa_device.cc
src/arch/arm/isa_device.hh
src/arch/arm/isa_traits.hh
src/arch/arm/kernel_stats.hh
src/arch/arm/kvm/ArmKvmCPU.py
src/arch/arm/kvm/ArmV8KvmCPU.py
src/arch/arm/kvm/BaseArmKvmCPU.py
src/arch/arm/kvm/KvmGic.py
src/arch/arm/kvm/SConscript
src/arch/arm/kvm/arm_cpu.cc
src/arch/arm/kvm/arm_cpu.hh
src/arch/arm/kvm/armv8_cpu.cc
src/arch/arm/kvm/armv8_cpu.hh
src/arch/arm/kvm/base_cpu.cc
src/arch/arm/kvm/base_cpu.hh
src/arch/arm/kvm/gic.cc
src/arch/arm/kvm/gic.hh
src/arch/arm/linux/atag.hh
src/arch/arm/linux/linux.cc
src/arch/arm/linux/linux.hh
src/arch/arm/linux/process.cc
src/arch/arm/linux/process.hh
src/arch/arm/linux/system.cc
src/arch/arm/linux/system.hh
src/arch/arm/locked_mem.hh
src/arch/arm/microcode_rom.hh
src/arch/arm/miscregs.cc
src/arch/arm/miscregs.hh
src/arch/arm/miscregs_types.hh
src/arch/arm/mmapped_ipr.hh
src/arch/arm/nativetrace.cc
src/arch/arm/nativetrace.hh
src/arch/arm/pagetable.hh
src/arch/arm/pauth_helpers.cc
src/arch/arm/pauth_helpers.hh
src/arch/arm/pmu.cc
src/arch/arm/pmu.hh
src/arch/arm/process.cc
src/arch/arm/process.hh
src/arch/arm/pseudo_inst.hh
src/arch/arm/qarma.cc
src/arch/arm/qarma.hh
src/arch/arm/registers.hh
src/arch/arm/remote_gdb.cc
src/arch/arm/remote_gdb.hh
src/arch/arm/semihosting.cc
src/arch/arm/semihosting.hh
src/arch/arm/stacktrace.cc
src/arch/arm/stacktrace.hh
src/arch/arm/stage2_lookup.cc
src/arch/arm/stage2_lookup.hh
src/arch/arm/stage2_mmu.cc
src/arch/arm/stage2_mmu.hh
src/arch/arm/system.cc
src/arch/arm/system.hh
src/arch/arm/table_walker.cc
src/arch/arm/table_walker.hh
src/arch/arm/tlb.cc
src/arch/arm/tlb.hh
src/arch/arm/tlbi_op.cc
src/arch/arm/tlbi_op.hh
src/arch/arm/tracers/SConscript
src/arch/arm/tracers/TarmacTrace.py
src/arch/arm/tracers/tarmac_base.cc
src/arch/arm/tracers/tarmac_base.hh
src/arch/arm/tracers/tarmac_parser.cc
src/arch/arm/tracers/tarmac_parser.hh
src/arch/arm/tracers/tarmac_record.cc
src/arch/arm/tracers/tarmac_record.hh
src/arch/arm/tracers/tarmac_record_v8.cc
src/arch/arm/tracers/tarmac_record_v8.hh
src/arch/arm/tracers/tarmac_tracer.cc
src/arch/arm/tracers/tarmac_tracer.hh
src/arch/arm/types.hh
src/arch/arm/utility.cc
src/arch/arm/utility.hh
src/arch/arm/vtophys.cc
src/arch/arm/vtophys.hh