i965: Combine both gl_PatchVerticesIn lowering passes.
authorKenneth Graunke <kenneth@whitecape.org>
Wed, 18 Jul 2018 23:42:03 +0000 (16:42 -0700)
committerKenneth Graunke <kenneth@whitecape.org>
Fri, 27 Jul 2018 04:51:36 +0000 (21:51 -0700)
commit488972222c6454551ab1559f753c13a493dc513f
tree8a82f16349438be19eb29e611c961654b0010ff6
parent29dd5dda9d189eebb2d14de71e3fe30722e72743
i965: Combine both gl_PatchVerticesIn lowering passes.

Until now, we had separate passes for lowering gl_PatchVerticesIn to
a statically known constant (for TES inputs when linked against a TCS),
and a uniform in the other cases.  Annoyingly, one had to be run before
nir_lower_system_values, and the other afterward.  This simplified the
passes, but made life painful for the callers.

This patch combines both into a single pass.  If you give it a non-zero
static count, it uses that.  If you give it Mesa state slots, it turns
it back into a built-in uniform.  Otherwise, it does nothing.

This also moves the i965 uniform lowering out to shared code.

v2: Make token arrays const.

Reviewed-by: Eric Anholt <eric@anholt.net>
src/compiler/nir/nir.h
src/compiler/nir/nir_lower_patch_vertices.c
src/intel/compiler/brw_nir.h
src/intel/vulkan/anv_pipeline.c
src/mesa/drivers/dri/i965/brw_nir_uniforms.cpp
src/mesa/drivers/dri/i965/brw_program.c