test MSR.SVF bit set after setvl Vertical-First mode set
authorLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Thu, 8 Jul 2021 21:26:30 +0000 (22:26 +0100)
committerLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Thu, 8 Jul 2021 21:26:30 +0000 (22:26 +0100)
commit490be63989595cb20aef4b2b5492d4800c60228b
tree2325dc8d8eab3e3c7c25e89d7dce5daf6acb724d
parentff2dd45e71dc173aa787cb3ac7da09f2236446ab
test MSR.SVF bit set after setvl Vertical-First mode set
src/openpower/decoder/isa/test_caller_setvl.py