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(parent: 51140f4) | patch
nv50/ir: fix DCE to not generate 96-bit loads
authorIlia Mirkin <imirkin@alum.mit.edu>
Thu, 3 Dec 2015 19:04:06 +0000 (14:04 -0500)
committerIlia Mirkin <imirkin@alum.mit.edu>
Fri, 4 Dec 2015 04:02:57 +0000 (23:02 -0500)
commit49692f86a1b77fac4634d2a3f0502ec7451c3435
tree1c8cae041cf81d90be35347778520a400d730e20tree
parent51140f452a8623c9b912126b027f0f1819e72531commit | diff
nv50/ir: fix DCE to not generate 96-bit loads

A situation where there's a 128-bit load where the last component gets
DCE'd causes a 96-bit load to be generated, which no GPU can actually
emit. Avoid generating such instructions by scaling back to 64-bit on
the first load when splitting.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "11.0 11.1" <mesa-stable@lists.freedesktop.org>
src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp diff | blob | history