dev-arm: Fix DTB autogen for HDLcd
authorGiacomo Travaglini <giacomo.travaglini@arm.com>
Wed, 29 Jul 2020 11:25:25 +0000 (12:25 +0100)
committerGiacomo Travaglini <giacomo.travaglini@arm.com>
Thu, 30 Jul 2020 16:06:34 +0000 (16:06 +0000)
commit4a309ae7475b810d16790a1995513a4b30c86837
tree22231eeec5348a126102a76579e25175452f6181
parent4715f6c72cc4c5d0e13bb4cac536eb1f31c313cb
dev-arm: Fix DTB autogen for HDLcd

The HDLcd was wrongly reporting the hardcoded IRQ=63 as the interrupt
number during DTB autogeneration. This is because the DTS is using 63.
However that corresponds to the SPI offset; the gem5 helper is
instead expecting the global IRQ number = 32 + SPI offset

Change-Id: I9e82360843eacb13cef5ddd2e28d2f3ef3147335
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/31940
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
src/dev/arm/RealView.py