re PR target/20924 (inline float divide does not set correct fpu status flags)
authorSteve Ellcey <sje@cup.hp.com>
Wed, 13 Apr 2005 15:57:37 +0000 (15:57 +0000)
committerSteve Ellcey <sje@gcc.gnu.org>
Wed, 13 Apr 2005 15:57:37 +0000 (15:57 +0000)
commit4a36a3f164d87fbab8b7058921bffe084993c877
tree74de71943d09b207c0118f9ce0ed68a263c9b85d
parent41f717fb6be3e6ab666a77d9e7cc7718f9929d3c
re PR target/20924 (inline float divide does not set correct fpu status flags)

PR target/20924
* config/ia64/ia64.md (divsf3_internal_lat): Generate frcpa with
fpsr 0 instead of fpsr 1.
(divsf3_internal_thr): Ditto.
(divdf3_internal_lat): Ditto.
(divdf3_internal_thr): Ditto.
(divxf3_internal_lat): Ditto.
(divxf3_internal_thr): Ditto.

From-SVN: r98095
gcc/ChangeLog
gcc/config/ia64/ia64.md