Bugfixes in writing of memories as Verilog
authorClifford Wolf <clifford@clifford.at>
Fri, 25 Sep 2015 11:49:26 +0000 (13:49 +0200)
committerClifford Wolf <clifford@clifford.at>
Fri, 25 Sep 2015 11:49:26 +0000 (13:49 +0200)
commit4ac202e2a5b07a610deb43a667ea3a66d95241d4
tree050342b0849beded4ecc8cc6369f2387a35c32f8
parentb2544cfcf77c3a7e923d05151a8e37b079559119
Bugfixes in writing of memories as Verilog
backends/verilog/verilog_backend.cc