Re: [libre-riscv-dev] processor and soc naming
authorLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Wed, 11 Mar 2020 22:58:52 +0000 (22:58 +0000)
committerlibre-riscv-dev <libre-riscv-dev@lists.libre-riscv.org>
Wed, 11 Mar 2020 22:59:16 +0000 (22:59 +0000)
commit4b254fc64bb378b566eac471403f9e65546fb9e5
tree8cc3d8f119be3c7fa9f64f760665b3dba0f06e94
parent7963f1a0cecbccfa14e9dc9537283dfb4ecbe92a
Re: [libre-riscv-dev] processor and soc naming
e5/37a54328aea8fc75fe88b399dec446be7c293b [new file with mode: 0644]