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(parent: 19f585a) | patch
intel-gem: Fix y-tile swizzling for our G965 with swizzle_mode=1.
authorEric Anholt <eric@anholt.net>
Wed, 2 Jul 2008 17:21:44 +0000 (10:21 -0700)
committerEric Anholt <eric@anholt.net>
Wed, 2 Jul 2008 17:21:44 +0000 (10:21 -0700)
commit4b3ed4d2d16811a624857519e95303017f4160b5
treefabe8a116da19f6d4fd636f38f9dafdfcee24465tree
parent19f585a3cf65887e249d630fe43e83e7e7618dfacommit | diff
intel-gem: Fix y-tile swizzling for our G965 with swizzle_mode=1.

Apparently in Y mode we get bit 6 ^ bit 9.  The reflect demo in 'd' mode now
displays correctly.
src/mesa/drivers/dri/intel/intel_span.c diff | blob | history