build/sim: allow defining start/end cycles for tracing
authorFlorent Kermarrec <florent@enjoy-digital.fr>
Fri, 7 Jun 2019 09:50:57 +0000 (11:50 +0200)
committerFlorent Kermarrec <florent@enjoy-digital.fr>
Fri, 7 Jun 2019 09:50:57 +0000 (11:50 +0200)
commit4b6ad8aa0dc9fbd910695769cc178edef3af712e
treec699bf9a7c4d296cc75cdd8452dcf248b9d7f97f
parentecb60f6e43092e9816c0f2ab231a250c55927a7a
build/sim: allow defining start/end cycles for tracing
litex/build/sim/core/veril.cpp
litex/build/sim/core/veril.h
litex/build/sim/verilator.py
litex/tools/litex_sim.py