radv: only sync CP DMA for transfer operations or bottom pipe
authorSamuel Pitoiset <samuel.pitoiset@gmail.com>
Tue, 20 Nov 2018 15:41:23 +0000 (16:41 +0100)
committerSamuel Pitoiset <samuel.pitoiset@gmail.com>
Wed, 21 Nov 2018 09:03:01 +0000 (10:03 +0100)
commit4b9bc4791b5778438f4829acd5a61d8b3574a257
tree513bb40a06ce6c15a4e1b0b86c06344a43cd2ee3
parent457ac6ce1e2ba98d5c1afb9e78298fd8eb126b81
radv: only sync CP DMA for transfer operations or bottom pipe

CP DMA can only be busy when the driver copies buffers. The
only affected Vulkan commands are vkCmdCopyBuffer() and
vkCmdUpdateBuffer() (because we fallback to a copy depending on
a threshold). Clear operations are currently not concerned
because the driver always syncs after the last DMA operation.

Per the spec, these two operations have to be externally
synchronized with VK_PIPELINE_STAGE_TRANSFER_BIT.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
src/amd/vulkan/radv_cmd_buffer.c