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(parent: f0e2caf) | patch
cpu: Made TAGE a SimObject that can be used by other predictors
authorJairo Balart <jairo.balart@metempsy.com>
Sat, 5 Jan 2019 09:24:17 +0000 (10:24 +0100)
committerPau Cabre <pau.cabre@metempsy.com>
Tue, 5 Feb 2019 10:11:43 +0000 (10:11 +0000)
commit4ba89236f00e1d18e7785da57941f25abfed6033
tree3389ecb484eb62ac8fdf81151d6c52e1086849f4tree
parentf0e2caf84fbbf225e46cbda61e45fc5727d4d885commit | diff
cpu: Made TAGE a SimObject that can be used by other predictors

The TAGE implementation is now a SimObject so that other branch predictors
can easily use it. It has also been updated with the latest available TAGE
implementation from Andre Seznec:

http://www.irisa.fr/alf/downloads/seznec/TAGE-GSC-IMLI.tar

Change-Id: I2251b8b2d7f94124f9955f52b917dc3b064f090e
Reviewed-on: https://gem5-review.googlesource.com/c/15317
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
16 files changed:
src/cpu/pred/2bit_local.cc diff | blob | history
src/cpu/pred/2bit_local.hh diff | blob | history
src/cpu/pred/BranchPredictor.py diff | blob | history
src/cpu/pred/SConscript diff | blob | history
src/cpu/pred/bi_mode.cc diff | blob | history
src/cpu/pred/bi_mode.hh diff | blob | history
src/cpu/pred/bpred_unit.cc diff | blob | history
src/cpu/pred/bpred_unit.hh diff | blob | history
src/cpu/pred/ltage.cc diff | blob | history
src/cpu/pred/ltage.hh diff | blob | history
src/cpu/pred/tage.cc diff | blob | history
src/cpu/pred/tage.hh diff | blob | history
src/cpu/pred/tage_base.cc [new file with mode: 0644] blob
src/cpu/pred/tage_base.hh [new file with mode: 0644] blob
src/cpu/pred/tournament.cc diff | blob | history
src/cpu/pred/tournament.hh diff | blob | history