Merge pull request #1136 from YosysHQ/xaig_ice40_wire_del
authorEddie Hung <eddie@fpgeh.com>
Wed, 26 Jun 2019 15:51:11 +0000 (08:51 -0700)
committerGitHub <noreply@github.com>
Wed, 26 Jun 2019 15:51:11 +0000 (08:51 -0700)
commit4f0cb3449573acb189e877407d7b19a5d140c9e7
tree7aa49a38e06a3dba641096066c3fc7f06a224217
parent5db96b8aec7be2fb864d0f41ef21bb5168fa6b5c
parent0dd850e6552a74430559ed63c3a9a67aa1c84512
Merge pull request #1136 from YosysHQ/xaig_ice40_wire_del

abc9: Add wire delays to synth_ice40