Add support for "fsm_export" synthesis attributes to fsm_export pass.
authorMartin Schmölzer <martin.schmoelzer@student.tuwien.ac.at>
Tue, 8 Jan 2013 08:31:31 +0000 (09:31 +0100)
committerMartin Schmölzer <martin.schmoelzer@student.tuwien.ac.at>
Tue, 8 Jan 2013 08:43:35 +0000 (09:43 +0100)
commit4f6cda502d8633068ebd137bbeb6cbc6bfabf938
tree3f99060acda83bee70411d69a0b7503a3c2aff90
parentbc630ba0fa249c09d4f3fb5ef48eb6d573a21879
Add support for "fsm_export" synthesis attributes to fsm_export pass.

This allows to specify the file name for exported files directly in the HDL
source via the fsm_export=... attribute on the FSM state register.

Verilog example:
    (* fsm_export="my_fsm.kiss2" *)
    reg [3:0] state;

The fsm_export pass now also accepts the option "-noauto". This causes only
FSMs with the fsm_export attribute to be exported, any other FSMs are ignored.

Signed-off-by: Martin Schmölzer <martin.schmoelzer@student.tuwien.ac.at>
passes/fsm/fsm_export.cc