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(parent: 0c28712) | patch
arch-arm: Use isSecure variable for Stage2Lookup
authorGiacomo Travaglini <giacomo.travaglini@arm.com>
Wed, 12 Aug 2020 12:16:21 +0000 (13:16 +0100)
committerGiacomo Travaglini <giacomo.travaglini@arm.com>
Fri, 14 Aug 2020 13:07:41 +0000 (13:07 +0000)
commit4fbe6cf41996b882522baf8f76ae72384acc47fe
tree41b8e4ddd70e410d25ee917287e84c650f1d5323tree
parent0c28712f51f5b0748c3afd5b287969ceb615ea8dcommit | diff
arch-arm: Use isSecure variable for Stage2Lookup

TLB entries are tagged with the security state of the cpu instead
of the security attribute of the physical address

Change-Id: I728ba1c841de1ec6c1ee03aee012b185c968d078
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/32639
Tested-by: kokoro <noreply+kokoro@google.com>
src/arch/arm/tlb.cc diff | blob | history