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(parent: 8bb30a8) | patch
sdram/phy/s6ddrphy: add S6QuarterRateDDRPHY to run DDR3 at higher frequencies.
authorFlorent Kermarrec <florent@enjoy-digital.fr>
Sat, 22 Aug 2015 10:15:53 +0000 (12:15 +0200)
committerFlorent Kermarrec <florent@enjoy-digital.fr>
Sat, 22 Aug 2015 10:17:48 +0000 (12:17 +0200)
commit50e857e99c3cfc70c5b5d1c6c3df44be507177f4
treee30bd519b4c71f152d835a33958e029661e54fa1tree
parent8bb30a8620ccac32cd4faf9b40bb1c76b798ef0dcommit | diff
sdram/phy/s6ddrphy: add S6QuarterRateDDRPHY to run DDR3 at higher frequencies.

Built on top of S6HalfRateDDRPHY, exposes a 4 phases DFI interface to the controller with a 2x slower clock.
Validated on the Numato Lab opsis board (50MHz sys_clk/ DDR400), should also work on the Novena laptop (same DDR3 module).
misoclib/mem/sdram/phy/s6ddrphy.py diff | blob | history