soc/interconnect: add wishbonebridge and uart bridge
authorFlorent Kermarrec <florent@enjoy-digital.fr>
Wed, 11 Nov 2015 23:52:36 +0000 (00:52 +0100)
committerFlorent Kermarrec <florent@enjoy-digital.fr>
Wed, 11 Nov 2015 23:52:36 +0000 (00:52 +0100)
commit525da89c7d1a95229424b4bfa549f1b6b9143de2
tree489f9b7c201c48b88d7f7cf84858768884367636
parent89b189ce4aa8c17581ad755e740feff89c577574
soc/interconnect: add wishbonebridge and uart bridge
litex/soc/cores/uart/bridge.py [new file with mode: 0644]
litex/soc/interconnect/wishbonebridge.py [new file with mode: 0644]