Merge pull request #1533 from dh73/bram_xilinx
authorEddie Hung <eddie@fpgeh.com>
Fri, 13 Dec 2019 20:01:03 +0000 (12:01 -0800)
committerGitHub <noreply@github.com>
Fri, 13 Dec 2019 20:01:03 +0000 (12:01 -0800)
commit52875b0d61b2b1cc83a9e9d51964a92027c3758c
treebbcfea00583b78107498a01fe2a7cdbb48e41e2d
parent9ab1feeaf11adb6b675ac4034e246cb137d07db9
parent1c9634558747bf5b92a309b6af013a54034c35d3
Merge pull request #1533 from dh73/bram_xilinx

Adjust Xilinx xc7/xcu BRAM min bits threshold for RAMB18E1