base: Add support for changing output directories
authorAndreas Sandberg <andreas@sandberg.pp.se>
Fri, 27 Nov 2015 14:41:59 +0000 (14:41 +0000)
committerAndreas Sandberg <andreas@sandberg.pp.se>
Fri, 27 Nov 2015 14:41:59 +0000 (14:41 +0000)
commit5383e1ada49b59daf4ff8703076923d4ccb6207d
tree3a3dd8f95be7cf5546a5c2d1e4e58107ae2c03a0
parentfed0ea55c476d9843e3f07e4f879254d34d99279
base: Add support for changing output directories

This changeset adds support for changing the simulator output
directory. This can be useful when the simulation goes through several
stages (e.g., a warming phase, a simulation phase, and a verification
phase) since it allows the output from each stage to be located in a
different directory. Relocation is done by calling core.setOutputDir()
from Python or simout.setOutputDirectory() from C++.

This change affects several parts of the design of the gem5's output
subsystem. First, files returned by an OutputDirectory instance (e.g.,
simout) are of the type OutputStream instead of a std::ostream. This
allows us to do some more book keeping and control re-opening of files
when the output directory is changed. Second, new subdirectories are
OutputDirectory instances, which should be used to create files in
that sub-directory.

Signed-off-by: Andreas Sandberg <andreas@sandberg.pp.se>
[sascha.bischoff@arm.com: Rebased patches onto a newer gem5 version]
Signed-off-by: Sascha Bischoff <sascha.bischoff@arm.com>
Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com>
21 files changed:
src/arch/arm/linux/system.cc
src/arch/arm/linux/system.hh
src/base/output.cc
src/base/output.hh
src/base/stats/text.cc
src/base/vnc/vncinput.cc
src/base/vnc/vncinput.hh
src/cpu/base.cc
src/cpu/o3/thread_state.hh
src/cpu/simple/probes/simpoint.cc
src/cpu/simple/probes/simpoint.hh
src/cpu/simple_thread.cc
src/dev/arm/hdlcd.cc
src/dev/arm/hdlcd.hh
src/dev/arm/pl111.cc
src/dev/arm/pl111.hh
src/dev/net/etherdump.cc
src/dev/terminal.cc
src/dev/terminal.hh
src/python/swig/trace.i
src/sim/pseudo_inst.cc