Set Verific flag vhdl_support_variable_slice=1
authorClifford Wolf <clifford@clifford.at>
Fri, 9 Nov 2018 20:03:13 +0000 (21:03 +0100)
committerClifford Wolf <clifford@clifford.at>
Fri, 9 Nov 2018 20:03:23 +0000 (21:03 +0100)
commit5387ccb041f4acafc96c7b3fcf8db04dddfb8ab5
tree457e2c509bbf6fb9ddc08d89bb13e67f8db3720c
parent43ee1f3f62a96d9b5a1a909d18c418af39ca520a
Set Verific flag vhdl_support_variable_slice=1

Signed-off-by: Clifford Wolf <clifford@clifford.at>
frontends/verific/verific.cc