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(parent: 2e9e754) | patch
TimingSimpleCPU: fix NO_ACCESS memory op handling
authorJoel Hestness <hestness@cs.utexas.edu>
Fri, 13 Aug 2010 00:16:02 +0000 (17:16 -0700)
committerJoel Hestness <hestness@cs.utexas.edu>
Fri, 13 Aug 2010 00:16:02 +0000 (17:16 -0700)
commit53c241fc16e4edaae8440b3dd360503537dbaba3
tree770f719bfdc90226ba7b755782382a3192513c78tree
parent2e9e75447a50146e0e8346de4362f7a4570f84eccommit | diff
TimingSimpleCPU: fix NO_ACCESS memory op handling

When a request is NO_ACCESS (x86 CDA microinstruction), the memory op
doesn't go to the cache, so TimingSimpleCPU::completeDataAccess needs
to handle the case where the current status of the CPU is Running
and not DcacheWaitResponse or DTBWaitResponse
src/cpu/simple/timing.cc diff | blob | history