git.libre-soc.org Git - gcc.git/commit

author	Christophe Lyon <christophe.lyon@linaro.org>
	Wed, 30 Sep 2015 08:14:03 +0000 (08:14 +0000)
committer	Christophe Lyon <clyon@gcc.gnu.org>
	Wed, 30 Sep 2015 08:14:03 +0000 (10:14 +0200)
commit	54cd497b0d403dc63fc7db55db3eb77045e23015
tree	3e1f9eb87e909f74365aa24098c90feddaec1149	tree
parent	76d5b80aba9f07dd13dcc7a99cbee8ce7f6f72e5	commit \| diff

[testsuite] Fix order of dg-do and dg-require-effective-target directives

2015-09-30 Christophe Lyon <christophe.lyon@linaro.org>

* g++.dg/cpp0x/stdint.C: Move dg-require-effective-target after
dg-do.
* g++.dg/gomp/tls-wrap4.C: Likewise.
* gcc.dg/atomic-op-optimize.c: Likewise.
* gcc.dg/pr54087.c: Likewise.
* gcc.dg/tls/section-2.c: Likewise.
* gcc.dg/vect/costmodel/ppc/costmodel-bb-slp-9a-pr63175.c:
Likewise.
* gcc.dg/vect/costmodel/ppc/costmodel-pr37194.c: Likewise.
* gcc.dg/vect/trapv-vect-reduc-4.c: Likewise.
* gcc.target/arm/divzero.c: Likewise.
* gcc.target/arm/sibcall-2.c: Likewise.
* gcc.target/arm/thumb1-Os-mult.c: Likewise.
* gcc.target/arm/thumb1-load-64bit-constant-1.c: Likewise.
* gcc.target/arm/thumb1-load-64bit-constant-2.c: Likewise.
* gcc.target/arm/thumb1-load-64bit-constant-3.c: Likewise.
* gcc.target/arm/volatile-bitfields-1.c: Likewise.
* gcc.target/arm/volatile-bitfields-2.c: Likewise.
* gcc.target/arm/volatile-bitfields-3.c: Likewise.
* gcc.target/arm/volatile-bitfields-4.c: Likewise.
* gfortran.dg/default_format_2.f90: Likewise.
* gfortran.dg/default_format_denormal_2.f90: Likewise.

From-SVN: r228280

gcc/testsuite/ChangeLog		diff \| blob \| history
gcc/testsuite/g++.dg/cpp0x/stdint.C		diff \| blob \| history
gcc/testsuite/g++.dg/gomp/tls-wrap4.C		diff \| blob \| history
gcc/testsuite/gcc.dg/atomic-op-optimize.c		diff \| blob \| history
gcc/testsuite/gcc.dg/pr54087.c		diff \| blob \| history
gcc/testsuite/gcc.dg/tls/section-2.c		diff \| blob \| history
gcc/testsuite/gcc.dg/vect/costmodel/ppc/costmodel-bb-slp-9a-pr63175.c		diff \| blob \| history
gcc/testsuite/gcc.dg/vect/costmodel/ppc/costmodel-pr37194.c		diff \| blob \| history
gcc/testsuite/gcc.dg/vect/trapv-vect-reduc-4.c		diff \| blob \| history
gcc/testsuite/gcc.target/arm/divzero.c		diff \| blob \| history
gcc/testsuite/gcc.target/arm/sibcall-2.c		diff \| blob \| history
gcc/testsuite/gcc.target/arm/thumb1-Os-mult.c		diff \| blob \| history
gcc/testsuite/gcc.target/arm/thumb1-load-64bit-constant-1.c		diff \| blob \| history
gcc/testsuite/gcc.target/arm/thumb1-load-64bit-constant-2.c		diff \| blob \| history
gcc/testsuite/gcc.target/arm/thumb1-load-64bit-constant-3.c		diff \| blob \| history
gcc/testsuite/gcc.target/arm/volatile-bitfields-1.c		diff \| blob \| history
gcc/testsuite/gcc.target/arm/volatile-bitfields-2.c		diff \| blob \| history
gcc/testsuite/gcc.target/arm/volatile-bitfields-3.c		diff \| blob \| history
gcc/testsuite/gcc.target/arm/volatile-bitfields-4.c		diff \| blob \| history
gcc/testsuite/gfortran.dg/default_format_2.f90		diff \| blob \| history
gcc/testsuite/gfortran.dg/default_format_denormal_2.f90		diff \| blob \| history