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(parent: ad14a41) | patch
Add jtag support in simulation via a socket
authorBenjamin Herrenschmidt <benh@kernel.crashing.org>
Mon, 16 Sep 2019 15:28:48 +0000 (16:28 +0100)
committerBenjamin Herrenschmidt <benh@kernel.crashing.org>
Fri, 20 Sep 2019 05:07:49 +0000 (15:07 +1000)
commit554b753172a9166578731c6faa170feb69660da8
tree6bd28e041a23dfb4cfd03896e986321c228af30btree
parentad14a41d801a23ba6f3afa1a992bbe7458c83636commit | diff
Add jtag support in simulation via a socket

This adds a local socket that can be used to communicate with
the debug tool (which will be committed separately) and generates
the JTAG signals.

We generate the low level JTAG signals, thus directly driving the
simulated BSCANE2, and the Xilinx DTM

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
sim_jtag.vhdl [new file with mode: 0644] blob
sim_jtag_socket.vhdl [new file with mode: 0644] blob
sim_jtag_socket_c.c [new file with mode: 0644] blob