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(parent: 1bb2580) | patch
litesata/phy/k7: apply AR# 63869 to keep CDR in hold during SATA link initialization
authorFlorent Kermarrec <florent@enjoy-digital.fr>
Wed, 10 Jun 2015 10:14:48 +0000 (12:14 +0200)
committerFlorent Kermarrec <florent@enjoy-digital.fr>
Wed, 10 Jun 2015 10:14:48 +0000 (12:14 +0200)
commit571ce5791a68e525711ed921cfc773c5879bf2e1
tree7650799fddcbfdafdd85ead1293cdf5e12fc80c0tree
parent1bb2580779816f92439fc624c6ebf1b0f486397dcommit | diff
litesata/phy/k7: apply AR# 63869 to keep CDR in hold during SATA link initialization

self.rxelecidle is already filtered so the "20 USRCLK cycles before setting RXCDRHOLD to 1'b0" are respected.
misoclib/mem/litesata/phy/k7/trx.py diff | blob | history