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MIPS16/GCC: Emit explicit JRC from `casesi_internal_mips16_<mode>' insn
authorMaciej W. Rozycki <macro@imgtec.com>
Wed, 16 Nov 2016 21:42:31 +0000 (21:42 +0000)
committerMaciej W. Rozycki <macro@gcc.gnu.org>
Wed, 16 Nov 2016 21:42:31 +0000 (21:42 +0000)
commit576b0863ee8451e2aecb69c28f552dd5bb31691a
tree0e19a777abe4c6399ae1b81b4c1139369c827370tree
parenta3be783adf3615d77da725cd3f51072cfbdcdee8commit | diff
MIPS16/GCC: Emit explicit JRC from `casesi_internal_mips16_<mode>' insn

gcc/
* config/mips/mips.md (casesi_internal_mips16_<mode>):
Explicitly switch between JR and JRC for the table jump.  Adjust
instruction count.

From-SVN: r242517
gcc/ChangeLog diff | blob | history
gcc/config/mips/mips.md diff | blob | history