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(parent: c40c8d4) | patch
Fix bugs in the simulation of the AArch64's ADDP, FADDP, LD1, CCMP and CCMP instructions.
authorNick Clifton <nickc@redhat.com>
Thu, 3 Mar 2016 15:14:35 +0000 (15:14 +0000)
committerNick Clifton <nickc@redhat.com>
Thu, 3 Mar 2016 15:22:53 +0000 (15:22 +0000)
commit57aa17424380be1c3e362a5601071f1f3a6f74f6
treee81c24eb3aee8c69ecb7eb0d063dfb2da003ea24tree
parentc40c8d4b6793b71eed7cf9fa7467edda2271dc86commit | diff
Fix bugs in the simulation of the AArch64's ADDP, FADDP, LD1, CCMP and CCMP instructions.

* simulator.c (set_flags_for_sub32): Correct type of signbit.
(CondCompare): Swap interpretation of bit 30.
(DO_ADDP): Delete macro.
(do_vec_ADDP): Copy source registers before starting to update
destination register.
(do_vec_FADDP): Likewise.
(do_vec_load_store): Fix computation of sizeof_operation.
(rbit64): Fix type of constant.
(aarch64_step): When displaying insn value, display all 32 bits.
sim/aarch64/ChangeLog diff | blob | history
sim/aarch64/simulator.c diff | blob | history