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(parent: fb5c095) | patch
x86: Add microop for fence
authorNilay Vaish <nilay@cs.wisc.edu>
Fri, 4 Nov 2011 03:52:21 +0000 (22:52 -0500)
committerNilay Vaish <nilay@cs.wisc.edu>
Fri, 4 Nov 2011 03:52:21 +0000 (22:52 -0500)
commit582ea4d5431f9fa9edbeb16835b04171647ea18b
treea9a3ae50ff09f7791525cf8313d8afec67f9f3e3tree
parentfb5c095cd53f4f16e139d9e959c41e089ff79896commit | diff
x86: Add microop for fence
This patch adds a new microop for memory barrier. The microop itself does
nothing, but since it is marked as a memory barrier, the O3 CPU should flush
all the pending loads and stores before the fence to the memory system.
src/arch/x86/isa/insts/general_purpose/arithmetic/add_and_subtract.py diff | blob | history
src/arch/x86/isa/insts/general_purpose/arithmetic/increment_and_decrement.py diff | blob | history
src/arch/x86/isa/insts/general_purpose/compare_and_test/bit_test.py diff | blob | history
src/arch/x86/isa/insts/general_purpose/data_transfer/xchg.py diff | blob | history
src/arch/x86/isa/insts/general_purpose/logical.py diff | blob | history
src/arch/x86/isa/insts/general_purpose/semaphores.py diff | blob | history
src/arch/x86/isa/microops/specop.isa diff | blob | history