i965/skl: Don't use ALL_SLICES_AT_EACH_LOD
authorNeil Roberts <neil@linux.intel.com>
Fri, 20 Feb 2015 19:11:46 +0000 (19:11 +0000)
committerNeil Roberts <neil@linux.intel.com>
Tue, 21 Apr 2015 05:03:21 +0000 (22:03 -0700)
commit584f8e1ec56b45057b53e161233308f38e1c3b09
treebc5f67152f1a846d6e5f790b599e897ae4da48e8
parentc1485f4b7d044724b3dbc1011f3c3a8a53132010
i965/skl: Don't use ALL_SLICES_AT_EACH_LOD

The render surface state command for Skylake doesn't have the surface
array spacing bit so it's not possible to select this layout. I think
it was only used in order to make it pick a tightly-packed qpitch
value that doesn't include space for the mipmaps. However this won't
be necessary after the next patch because it will automatically pick a
packed qpitch value whenever first_level==last_level. It is better to
remove this layout entirely on Gen8+ because although it can
effectively be implemented with a small qpitch value when there are no
mipmaps it isn't possible to support the case where there are mipmaps
because in that case the layout is very different.

It could be good to make a similar change for Gen8 if we also change
the layouting code to pick the qpitch value in a similar way.

v2: Make the commit message and comments more convincing

Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
Tested-by: Ben Widawsky <ben@bwidawsk.net>
src/mesa/drivers/dri/i965/intel_mipmap_tree.c