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(parent: e86ae1b) | patch
i965/gen6/gs: implement GS_OPCODE_SVB_SET_DST_INDEX opcode
authorSamuel Iglesias Gonsalvez <siglesias@igalia.com>
Fri, 18 Jul 2014 08:47:15 +0000 (10:47 +0200)
committerIago Toral Quiroga <itoral@igalia.com>
Fri, 19 Sep 2014 13:01:16 +0000 (15:01 +0200)
commit5933a08bd98d053a4cc5797d901bb399a8a5b470
treee3a0e0c15240dff780dca9798475e3f48e69a1fatree
parente86ae1b0a32bbbe4fb02ae9cee5b447a75d7e27fcommit | diff
i965/gen6/gs: implement GS_OPCODE_SVB_SET_DST_INDEX opcode

This opcode generates code to copy the specified destination index
into subregister 5 of the MRF message header.

Signed-off-by: Samuel Iglesias Gonsalvez <siglesias@igalia.com>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
src/mesa/drivers/dri/i965/brw_defines.h diff | blob | history
src/mesa/drivers/dri/i965/brw_shader.cpp diff | blob | history
src/mesa/drivers/dri/i965/brw_vec4.h diff | blob | history
src/mesa/drivers/dri/i965/brw_vec4_generator.cpp diff | blob | history