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(parent: e68cd91) | patch
freedreno/a3xx: also set FSSUPERTHREADENABLE
authorRob Clark <robdclark@gmail.com>
Fri, 23 Nov 2018 16:30:34 +0000 (11:30 -0500)
committerRob Clark <robdclark@gmail.com>
Tue, 27 Nov 2018 20:44:03 +0000 (15:44 -0500)
commit5973a4d0b7df54264b7f314153363877bfe6b8ad
treee20d5e8285af9fba517a79c0e5677acdedc2c032tree
parente68cd912518b924e025947adf7c3accc69993bbacommit | diff
freedreno/a3xx: also set FSSUPERTHREADENABLE

We set equiv bit in SP_FS_CTRL_REG0.  Somehow the hw doesn't hang with
this mismatched config, but does run slower.  It is faster with either
neither bit set, or both bits set, but both is the fastest of the three
configurations.  Worth a bit over 10% gain in glmark2.

Spotted-by: Jonathan Marek <jonathan@marek.ca>
Signed-off-by: Rob Clark <robdclark@gmail.com>
src/gallium/drivers/freedreno/a3xx/fd3_program.c diff | blob | history