projects / litex.git / commit
? search:
summary | shortlog | log | commit | commitdiff | tree
(parent: d62ef38) | patch
Fix off-by-one error on almost full condition for prefetch
authorbunnie <bunnie@kosagi.com>
Tue, 24 Mar 2020 06:11:23 +0000 (14:11 +0800)
committerFlorent Kermarrec <florent@enjoy-digital.fr>
Tue, 24 Mar 2020 07:04:35 +0000 (08:04 +0100)
commit5a402264d0416f4e1af3c122807a505383e7d4ba
tree7e925c1770a49be0b73f3378069021a4ba6f8d1ftree
parentd62ef38c4bfbbc0658066d8a45180917197d46d9commit | diff
Fix off-by-one error on almost full condition for prefetch

This causes a DRC error on the Xilinx tools when the prefetch
lines setting is 1. Don't know why this wasn't caught earlier,
but it just popped up in CI.
litex/soc/cores/spi_opi.py diff | blob | history