arch-arm: Fix decoding for SVE memory instructions
authorAdriĆ  Armejach <adria.armejach@gmail.com>
Tue, 14 Aug 2018 13:27:19 +0000 (15:27 +0200)
committerGiacomo Gabrielli <giacomo.gabrielli@arm.com>
Sat, 27 Jul 2019 20:51:31 +0000 (20:51 +0000)
commit5aa47eb50403a6c6e262f3827c5365d4253aba29
tree632512ab699eee49207bedb2fb5ef19a57c9ddee
parent2e47c6c5ed37dc1db0ea35f51b2f7d4afc0da45e
arch-arm: Fix decoding for SVE memory instructions

Some SVE memory instructions are missing the makeSP function for
register operands that can be the SP register. This leads to
segmentation faults on the application side as the wrong register is
decoded.

Change-Id: Ic71abc845e0786a60d665231b5f7b024d2955f4b
Signed-off-by: Giacomo Gabrielli <giacomo.gabrielli@arm.com>
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/19169
Tested-by: kokoro <noreply+kokoro@google.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
src/arch/arm/isa/formats/sve_2nd_level.isa