git.libre-soc.org Git - gcc.git/commit

[ARM][GCC][7/5x]: MVE store intrinsics which stores byte,half word or word to memory.

This patch supports the following MVE ACLE store intrinsics which stores a byte, halfword, or word to memory.

vst1q_f32, vst1q_f16, vst1q_s8, vst1q_s32, vst1q_s16, vst1q_u8, vst1q_u32, vst1q_u16, vstrhq_f16, vstrhq_scatter_offset_s32, vstrhq_scatter_offset_s16, vstrhq_scatter_offset_u32, vstrhq_scatter_offset_u16, vstrhq_scatter_offset_p_s32, vstrhq_scatter_offset_p_s16, vstrhq_scatter_offset_p_u32, vstrhq_scatter_offset_p_u16, vstrhq_scatter_shifted_offset_s32,
vstrhq_scatter_shifted_offset_s16, vstrhq_scatter_shifted_offset_u32,
vstrhq_scatter_shifted_offset_u16, vstrhq_scatter_shifted_offset_p_s32,
vstrhq_scatter_shifted_offset_p_s16, vstrhq_scatter_shifted_offset_p_u32,
vstrhq_scatter_shifted_offset_p_u16, vstrhq_s32, vstrhq_s16, vstrhq_u32, vstrhq_u16, vstrhq_p_f16, vstrhq_p_s32, vstrhq_p_s16, vstrhq_p_u32, vstrhq_p_u16, vstrwq_f32, vstrwq_s32, vstrwq_u32, vstrwq_p_f32, vstrwq_p_s32, vstrwq_p_u32.

Please refer to M-profile Vector Extension (MVE) intrinsics [1]  for more details.
[1]  https://developer.arm.com/architectures/instruction-sets/simd-isas/helium/mve-intrinsics

2020-03-18  Andre Vieira  <andre.simoesdiasvieira@arm.com>
            Mihail Ionescu  <mihail.ionescu@arm.com>
            Srinath Parvathaneni  <srinath.parvathaneni@arm.com>

* config/arm/arm_mve.h (vst1q_f32): Define macro.
(vst1q_f16): Likewise.
(vst1q_s8): Likewise.
(vst1q_s32): Likewise.
(vst1q_s16): Likewise.
(vst1q_u8): Likewise.
(vst1q_u32): Likewise.
(vst1q_u16): Likewise.
(vstrhq_f16): Likewise.
(vstrhq_scatter_offset_s32): Likewise.
(vstrhq_scatter_offset_s16): Likewise.
(vstrhq_scatter_offset_u32): Likewise.
(vstrhq_scatter_offset_u16): Likewise.
(vstrhq_scatter_offset_p_s32): Likewise.
(vstrhq_scatter_offset_p_s16): Likewise.
(vstrhq_scatter_offset_p_u32): Likewise.
(vstrhq_scatter_offset_p_u16): Likewise.
(vstrhq_scatter_shifted_offset_s32): Likewise.
(vstrhq_scatter_shifted_offset_s16): Likewise.
(vstrhq_scatter_shifted_offset_u32): Likewise.
(vstrhq_scatter_shifted_offset_u16): Likewise.
(vstrhq_scatter_shifted_offset_p_s32): Likewise.
(vstrhq_scatter_shifted_offset_p_s16): Likewise.
(vstrhq_scatter_shifted_offset_p_u32): Likewise.
(vstrhq_scatter_shifted_offset_p_u16): Likewise.
(vstrhq_s32): Likewise.
(vstrhq_s16): Likewise.
(vstrhq_u32): Likewise.
(vstrhq_u16): Likewise.
(vstrhq_p_f16): Likewise.
(vstrhq_p_s32): Likewise.
(vstrhq_p_s16): Likewise.
(vstrhq_p_u32): Likewise.
(vstrhq_p_u16): Likewise.
(vstrwq_f32): Likewise.
(vstrwq_s32): Likewise.
(vstrwq_u32): Likewise.
(vstrwq_p_f32): Likewise.
(vstrwq_p_s32): Likewise.
(vstrwq_p_u32): Likewise.
(__arm_vst1q_s8): Define intrinsic.
(__arm_vst1q_s32): Likewise.
(__arm_vst1q_s16): Likewise.
(__arm_vst1q_u8): Likewise.
(__arm_vst1q_u32): Likewise.
(__arm_vst1q_u16): Likewise.
(__arm_vstrhq_scatter_offset_s32): Likewise.
(__arm_vstrhq_scatter_offset_s16): Likewise.
(__arm_vstrhq_scatter_offset_u32): Likewise.
(__arm_vstrhq_scatter_offset_u16): Likewise.
(__arm_vstrhq_scatter_offset_p_s32): Likewise.
(__arm_vstrhq_scatter_offset_p_s16): Likewise.
(__arm_vstrhq_scatter_offset_p_u32): Likewise.
(__arm_vstrhq_scatter_offset_p_u16): Likewise.
(__arm_vstrhq_scatter_shifted_offset_s32): Likewise.
(__arm_vstrhq_scatter_shifted_offset_s16): Likewise.
(__arm_vstrhq_scatter_shifted_offset_u32): Likewise.
(__arm_vstrhq_scatter_shifted_offset_u16): Likewise.
(__arm_vstrhq_scatter_shifted_offset_p_s32): Likewise.
(__arm_vstrhq_scatter_shifted_offset_p_s16): Likewise.
(__arm_vstrhq_scatter_shifted_offset_p_u32): Likewise.
(__arm_vstrhq_scatter_shifted_offset_p_u16): Likewise.
(__arm_vstrhq_s32): Likewise.
(__arm_vstrhq_s16): Likewise.
(__arm_vstrhq_u32): Likewise.
(__arm_vstrhq_u16): Likewise.
(__arm_vstrhq_p_s32): Likewise.
(__arm_vstrhq_p_s16): Likewise.
(__arm_vstrhq_p_u32): Likewise.
(__arm_vstrhq_p_u16): Likewise.
(__arm_vstrwq_s32): Likewise.
(__arm_vstrwq_u32): Likewise.
(__arm_vstrwq_p_s32): Likewise.
(__arm_vstrwq_p_u32): Likewise.
(__arm_vstrwq_p_f32): Likewise.
(__arm_vstrwq_f32): Likewise.
(__arm_vst1q_f32): Likewise.
(__arm_vst1q_f16): Likewise.
(__arm_vstrhq_f16): Likewise.
(__arm_vstrhq_p_f16): Likewise.
(vst1q): Define polymorphic variant.
(vstrhq): Likewise.
(vstrhq_p): Likewise.
(vstrhq_scatter_offset_p): Likewise.
(vstrhq_scatter_offset): Likewise.
(vstrhq_scatter_shifted_offset_p): Likewise.
(vstrhq_scatter_shifted_offset): Likewise.
(vstrwq_p): Likewise.
(vstrwq): Likewise.
* config/arm/arm_mve_builtins.def (STRS): Use builtin qualifier.
(STRS_P): Likewise.
(STRSS): Likewise.
(STRSS_P): Likewise.
(STRSU): Likewise.
(STRSU_P): Likewise.
(STRU): Likewise.
(STRU_P): Likewise.
* config/arm/mve.md (VST1Q): Define iterator.
(VSTRHSOQ): Likewise.
(VSTRHSSOQ): Likewise.
(VSTRHQ): Likewise.
(VSTRWQ): Likewise.
(mve_vstrhq_fv8hf): Define RTL pattern.
(mve_vstrhq_p_fv8hf): Likewise.
(mve_vstrhq_p_<supf><mode>): Likewise.
(mve_vstrhq_scatter_offset_p_<supf><mode>): Likewise.
(mve_vstrhq_scatter_offset_<supf><mode>): Likewise.
(mve_vstrhq_scatter_shifted_offset_p_<supf><mode>): Likewise.
(mve_vstrhq_scatter_shifted_offset_<supf><mode>): Likewise.
(mve_vstrhq_<supf><mode>): Likewise.
(mve_vstrwq_fv4sf): Likewise.
(mve_vstrwq_p_fv4sf): Likewise.
(mve_vstrwq_p_<supf>v4si): Likewise.
(mve_vstrwq_<supf>v4si): Likewise.
(mve_vst1q_f<mode>): Define expand.
(mve_vst1q_<supf><mode>): Likewise.

gcc/testsuite/ChangeLog:

2020-03-18  Andre Vieira  <andre.simoesdiasvieira@arm.com>
            Mihail Ionescu  <mihail.ionescu@arm.com>
            Srinath Parvathaneni  <srinath.parvathaneni@arm.com>

* gcc.target/arm/mve/intrinsics/vst1q_f16.c: New test.
* gcc.target/arm/mve/intrinsics/vst1q_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vst1q_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vst1q_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vst1q_s8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vst1q_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vst1q_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vst1q_u8.c: Likewise.
* gcc.target/arm/mve/intrinsics/vstrhq_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vstrhq_p_f16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vstrhq_p_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vstrhq_p_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vstrhq_p_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vstrhq_p_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vstrhq_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vstrhq_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_p_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_p_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_p_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_p_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_s16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_p_s16.c:
Likewise.
* gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_p_s32.c:
Likewise.
* gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_p_u16.c:
Likewise.
* gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_p_u32.c:
Likewise.
* gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_s16.c:
Likewise.
* gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_s32.c:
Likewise.
* gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_u16.c:
Likewise.
* gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_u32.c:
Likewise.
* gcc.target/arm/mve/intrinsics/vstrhq_u16.c: Likewise.
* gcc.target/arm/mve/intrinsics/vstrhq_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vstrwq_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vstrwq_p_f32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vstrwq_p_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vstrwq_p_u32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vstrwq_s32.c: Likewise.
* gcc.target/arm/mve/intrinsics/vstrwq_u32.c: Likewise.

author	Srinath Parvathaneni <srinath.parvathaneni@arm.com>
	Wed, 18 Mar 2020 19:08:29 +0000 (19:08 +0000)
committer	Kyrylo Tkachov <kyrylo.tkachov@arm.com>
	Wed, 18 Mar 2020 19:08:29 +0000 (19:08 +0000)
commit	5cad47e0f85e59e21a5df04d34d813a860ff42d4
tree	fb359130fea9659460f7d76fa0beb79c1745c1a2	tree
parent	4cc23303bad126f844a14f88c344317e6cf4c3dc	commit \| diff

gcc/ChangeLog		diff \| blob \| history
gcc/config/arm/arm_mve.h		diff \| blob \| history
gcc/config/arm/arm_mve_builtins.def		diff \| blob \| history
gcc/config/arm/mve.md		diff \| blob \| history
gcc/testsuite/ChangeLog		diff \| blob \| history
gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_base_s64.c		diff \| blob \| history
gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_base_u64.c		diff \| blob \| history
gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_base_z_s64.c		diff \| blob \| history
gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_base_z_u64.c		diff \| blob \| history
gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_offset_s64.c		diff \| blob \| history
gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_offset_u64.c		diff \| blob \| history
gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_offset_z_s64.c		diff \| blob \| history
gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_offset_z_u64.c		diff \| blob \| history
gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_shifted_offset_s64.c		diff \| blob \| history
gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_shifted_offset_u64.c		diff \| blob \| history
gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_shifted_offset_z_s64.c		diff \| blob \| history
gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrdq_gather_shifted_offset_z_u64.c		diff \| blob \| history
gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_f16.c		diff \| blob \| history
gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_offset_z_f16.c		diff \| blob \| history
gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_f16.c		diff \| blob \| history
gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrhq_gather_shifted_offset_z_f16.c		diff \| blob \| history
gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_f32.c		diff \| blob \| history
gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_base_z_f32.c		diff \| blob \| history
gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_offset_f32.c		diff \| blob \| history
gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_offset_s32.c		diff \| blob \| history
gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_offset_u32.c		diff \| blob \| history
gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_offset_z_f32.c		diff \| blob \| history
gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_offset_z_s32.c		diff \| blob \| history
gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_offset_z_u32.c		diff \| blob \| history
gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_shifted_offset_f32.c		diff \| blob \| history
gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_shifted_offset_s32.c		diff \| blob \| history
gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_shifted_offset_u32.c		diff \| blob \| history
gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_shifted_offset_z_f32.c		diff \| blob \| history
gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_shifted_offset_z_s32.c		diff \| blob \| history
gcc/testsuite/gcc.target/arm/mve/intrinsics/vldrwq_gather_shifted_offset_z_u32.c		diff \| blob \| history
gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_f16.c	[new file with mode: 0644]	blob
gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_f32.c	[new file with mode: 0644]	blob
gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_s16.c	[new file with mode: 0644]	blob
gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_s32.c	[new file with mode: 0644]	blob
gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_s8.c	[new file with mode: 0644]	blob
gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_u16.c	[new file with mode: 0644]	blob
gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_u32.c	[new file with mode: 0644]	blob
gcc/testsuite/gcc.target/arm/mve/intrinsics/vst1q_u8.c	[new file with mode: 0644]	blob
gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_f16.c	[new file with mode: 0644]	blob
gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_p_f16.c	[new file with mode: 0644]	blob
gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_p_s16.c	[new file with mode: 0644]	blob
gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_p_s32.c	[new file with mode: 0644]	blob
gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_p_u16.c	[new file with mode: 0644]	blob
gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_p_u32.c	[new file with mode: 0644]	blob
gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_s16.c	[new file with mode: 0644]	blob
gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_s32.c	[new file with mode: 0644]	blob
gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_p_s16.c	[new file with mode: 0644]	blob
gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_p_s32.c	[new file with mode: 0644]	blob
gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_p_u16.c	[new file with mode: 0644]	blob
gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_p_u32.c	[new file with mode: 0644]	blob
gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_s16.c	[new file with mode: 0644]	blob
gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_s32.c	[new file with mode: 0644]	blob
gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_u16.c	[new file with mode: 0644]	blob
gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_offset_u32.c	[new file with mode: 0644]	blob
gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_p_s16.c	[new file with mode: 0644]	blob
gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_p_s32.c	[new file with mode: 0644]	blob
gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_p_u16.c	[new file with mode: 0644]	blob
gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_p_u32.c	[new file with mode: 0644]	blob
gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_s16.c	[new file with mode: 0644]	blob
gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_s32.c	[new file with mode: 0644]	blob
gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_u16.c	[new file with mode: 0644]	blob
gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_scatter_shifted_offset_u32.c	[new file with mode: 0644]	blob
gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_u16.c	[new file with mode: 0644]	blob
gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrhq_u32.c	[new file with mode: 0644]	blob
gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_f32.c	[new file with mode: 0644]	blob
gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_p_f32.c	[new file with mode: 0644]	blob
gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_p_s32.c	[new file with mode: 0644]	blob
gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_p_u32.c	[new file with mode: 0644]	blob
gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_s32.c	[new file with mode: 0644]	blob
gcc/testsuite/gcc.target/arm/mve/intrinsics/vstrwq_u32.c	[new file with mode: 0644]	blob