projects / libreriscv.git / commit
? search:
summary | shortlog | log | commit | commitdiff | tree
(parent: 36ca948) | patch
replace if RA = 0 then b<-0 etc. with b<-(RA|0)
authorLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Sat, 4 Apr 2020 15:45:32 +0000 (16:45 +0100)
committerLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Sat, 4 Apr 2020 15:45:32 +0000 (16:45 +0100)
commit5ce2f7b7277b1f21a77ca2f78238069d4d463599
tree9dd09d9493358d1fc1560b3e04d8a7138abde609tree
parent36ca948926f4c13b6e121948606a4d1aed8394f6commit | diff
replace if RA = 0 then b<-0 etc. with b<-(RA|0)
openpower/isa/fixedload.mdwn diff | blob | history
openpower/isa/fixedstore.mdwn diff | blob | history
http://libre-riscv.org ikiwiki