i965: Add peepholing of conditional mod generation from expressions.
authorEric Anholt <eric@anholt.net>
Thu, 14 Oct 2010 18:27:17 +0000 (11:27 -0700)
committerEric Anholt <eric@anholt.net>
Thu, 14 Oct 2010 19:02:54 +0000 (12:02 -0700)
commit5dd07b442e02696bf0ec5d4e3b4be1674519664a
treef80e5216781b8abc78cfcc1cdc9a8060f8212ec6
parentd5599c0b6a22cd0bbc475ec715824660144d02a0
i965: Add peepholing of conditional mod generation from expressions.

This cuts usually 2 out of 3 instructions for flag reg generation (if
statements, conditional assignment) by producing the conditional mod
in the expression representing the boolean value.

Fixes glsl-fs-vec4-indexing-temp-dst-in-nested-loop-combined (register
allocation no longer fails for the conditional generation
proliferation)
src/mesa/drivers/dri/i965/brw_fs.cpp