Improving error message when csr name is not found.
authorTim 'mithro' Ansell <me@mith.ro>
Sun, 4 Mar 2018 00:02:44 +0000 (16:02 -0800)
committerTim 'mithro' Ansell <me@mith.ro>
Sun, 4 Mar 2018 00:02:44 +0000 (16:02 -0800)
commit5ef34500f7b0c49369505c88eaf5c6a116f51efd
tree9a9c8c914ae0c773c6ad6f39ffa2991796c52dc0
parentab2a3277c3da18d2d46f85f8a76045f739312f77
Improving error message when csr name is not found.

Before;
```
"/usr/local/lib/python3.5/dist-packages/litex-0.1-py3.5.egg/litex/soc/integration/soc_core.py",
line 258, in get_csr_dev_address
return self.csr_map[name]
KeyError: 'core'
```

Now;
```
Traceback (most recent call last):
  File "XXXX/github/enjoy-digital/litex/litex/soc/integration/soc_core.py", line 259, in get_csr_dev_address
    return self.csr_map[name]
KeyError: 'ddrphy'

The above exception was the direct cause of the following exception:

Traceback (most recent call last):
  ...
  File "XXXX/github/enjoy-digital/litex/litex/soc/interconnect/csr_bus.py", line 199, in scan
    mapaddr = self.address_map(name, None)
  File "XXXX/github/enjoy-digital/litex/litex/soc/integration/soc_core.py", line 269, in get_csr_dev_address
    ) from e
RuntimeError: Unable to find ddrphy in your SoC's csr address map.

Check BaseSoC.csr_map in XXXX/github/enjoy-digital/litex/litex/boards/targets/arty.py

Found l2_cache, timer0, ddrphy2, buttons, sdram, identifier_mem, uart, uart_phy, leds, crg in the csr_map
```
litex/soc/integration/soc_core.py