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(parent: 0fc490c) | patch
intel/compiler: Validate some instruction word encodings
authorMatt Turner <mattst88@gmail.com>
Thu, 2 Jan 2020 22:44:16 +0000 (14:44 -0800)
committerMarge Bot <eric+marge@anholt.net>
Wed, 22 Jan 2020 00:19:21 +0000 (00:19 +0000)
commit5f4eacaeda58e358072f0000403410b825803c13
tree2eb2730aaf06c6feec770e23717fc2778e678618tree
parent0fc490cdee93d031cbb4e27efb0710190af78e68commit | diff
intel/compiler: Validate some instruction word encodings

Specifically, execution size, register file, and register type. I did
not add validation for vertical stride and width because I don't believe
it's possible to have an otherwise valid instruction with an invalid
vertical stride or width, due to all of the other regioning
restrictions.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2635>
src/intel/compiler/brw_eu_validate.c diff | blob | history